bench testing of incandecent soft start ckt

**wquiles** · 12-17-2005, 04:08 PM

In this post Andrew posted a circuit to give a soft start to an incandecent bulb, and I decided to try it out today.

Here is the modified schematic from Andrew that I implemented:

my very mesy bench:

my test circuit OFF:

my test circuit ON:

In these two following shots, the top trace (channel 1) is the voltage at the ON side of the switch, while the bottom trace (channel 2) is the voltage accross the capacitor C1. The vertical scale is 2V/div and the horizontal scale is 100mS/div. Trigger is set off channel 1 on the upward pulse of 1.0V.

Digital Storage Scope of a single, short pulse on the switch. You can actually see the drop in the battery pack's voltage when the FET finally turns ON - see the short dip, before the battery pack recovers, about 150mS after the trigger point:

and two, back to back short pulses:

- battery source: modamag 4xAA series adapter with freshly charged CBP1650 cells
- lamp: standard 3xcell M*g bulb
- R3 = 5K
- R4 = 200K
- C1 = 33uF (100V since it was all I had!)
- 3A, 100V rated N.O. switch
- N-channel FET: International Rectifier IRL3713PBF (super low Rds(on) at 4.5Vgs of 3.3 miliOhms !!!)

Per the scope, the soft start is more or less about 150mS, which to the human eye is VERY fast

I eventually want to build this circuit for powering 3x17670 (protected) cells for a SF MN60 or MN61 bulb on a custom adapter for my M6, so this early sucess with the circuit is a good start. Adapter would look something like this, with the circuit in that open space - of course the rods would be flush with the bottom plate and I would create a new positive end on the top plate:

Thanks Andrew and js for your advice/help so far

Will

**andrewwynn** · 12-18-2005, 01:57 AM

Ok.. very excellent so far.. however.. more work involved.. so far i can only see that you have a delaed start, not too much evidence of a 'soft' start.. if there is a sag in Vbat it means the FET turns on hard, correct?

you need to put like a 0.05ohm sense resistor (you can use a few inches of like 24ga wire (1/2 mohm per inch.. and the amount is not that important).. in series with the lamp and get a current measurment over time.. there is obviously a current spike when the FET turns on and we want to limit how bad that spike is.

Once you get that figured out and what values to use for the C1 and R3.

If you are using the FET for soft start you might as well loose the switch from the current path... it will more than double the circuit resistance, just controlling the FET will shut the lamp off and you only need mili or micro amps to control the FET.

With the big cap you have it might take a really long time to shut off i suspect is why you moved the switch? you need a smaller C1 to make this ckt sing (or you might be able to use about 15-20k for R4 so that the cap will discharge to shut off the FET.

When i was down in the 200msec or less turn on, i still was getting current surges 2-3x running, so you need to get a sweep of the current spike that's causing the Vbat dip, and tweak the RC values to get that to be nice.

incredible to see an idea develop, i only invented that ckt like 1/2 a day ago or something and to see it runnign on a bench.. so cool.. saved me the work .

-awr

**andrewwynn** · 12-18-2005, 03:46 AM

ok i just did a little reasearch and it looks like it might be harder to match the voltage you are aming for.. the MN61 i found a reference that shows it takes only 8.35v.. now that's probablky average so it can probably handle 9.. but you will def. need regulation not just a resistor to drop that much voltage.. and at 2.3A.. x 1.8V = 4W.. that's a lot of heat to lose.. (much less than what is generated in the MB20 pack so i don't think it's that big of a deal actually).. just that is' something that has to be dealt with.

Oh.. btw.. i do have an extremely simple driver circuit design you could probably build into that holder.. search for 'ludicrously' in cpf in batteries included you should find it.

Otherwise another ckt design just uses an opamp and vref a couple resistors .. i found an 8 pin chip that has both the opamp and voltage reference buiolt into one.. and had plans on making a simple regulator ckt out of that.

I want to get a nice ckt out there people can build themselves for $4 rather than have to pay 10-15x that to get the 'full boat fancy' one.

-awr

**andrewwynn** · 12-18-2005, 04:23 AM

ok.. for reference.. here are the original ckts:

'mark 1' is on the lef 'mark 2' is on the right.

Now that you have 'mark 1' operational i think you need to move up to mark2.. it's far more refined..

as described in the initial post.. most of the delay is just waiting for the FET to start turning on.. and that's not a 'soft' start at all... though it does put the vGate into a slower deriviative than initially.. however.. with mark2 of the circuit you should be able to 'skip' most of that initial delay and get right to the important part.. turning on the FET but slowly.

You need to measure bulb voltage and current.. if you can get those two on your scope top/bottom would be very helpful.. and for setting purposes having vgate vs ibulb might be extremely useful.. ideally having vGate, vBulb and iBulb at once.

as mentioned.. in the final ckt you would not want to break the power from the battery that's the FETs job also.. why introduce physical high-resistance contacts into a ckt with a 3.3mohm FET?

The theory behind the mark 2 ckt is that with R5 set just right.. the Vgate will jump instantly when the switch is thrown to just below the threshold voltage.. than the R3/C1 time constant can be reaaaly streteched out.. make it so that it takes a good second to get the lamp to turn on all the way (a good way to find out how slow the lamp is turning on is meausre the Vfet vs Vlamp).

if you are putting in your own switch, using a SPDT switch and having the common on the bottom and having the 'out' terminals toggle between Vbat and ground will greatly speed up the reset time.. i'm still working on a way to short out C1 quickly when the swtich is opened.. but w/o introducing a differnet type of switch, because ideally we can just use the stock mag switch w/o modification 'as is'.

I think i came up with a really clever way to solve the quick-reset.

Ok.. take a pch FET and put it from the gate on FET1 through a small resistance like 10 to 100k.. to ground... The gate of FET2 goes to the wiper of a high resistance pot that goes from the bottom of C1 to the wiper of R3 (also the neg of switch 1).. (also means the pot3 just goes from wiper to highV of R5)..

Theory.. you set the pot 3 so that when the ckt is on.. the Vgate is high enough that it doesn't conduct.. but near the threshhold voltage..

When Sw1 is opened.. immediately the wiper of R5 goes to zero basically dropping 2V from the base ground on pot3.. that will pull the voltage-bridged wiper down across the threshold voltage which will turn on FET2 and very quickly empty C1.

Since there are no caps in series with R5.. when you turn the switch back on.. it will instantaneously raise the gate voltage above the threshold voltage and turn off FET2 allowing the ckt to charge and work normally.

This should work unless i missed something.. gets a little bit complicated with 3 pots and two FETs but simple to master.. and once the values are figured out a wide range of voltage solutions could be had with only 1 trim pot to decide how fast to turn on the FET.

(some of my designs incorporate a Vreg to put a constant voltage downstream of the switch so you have more accurate control of turn on (not based on Vbat).. but i think a pre-set value for top/bot of R5 would work very well..

Oh.. i'm also realizing.. it could easily be re-worked by putting the top of R5 to the wiper of R3.. but that means that the base of C1 is not constant, but it might make the recycle time low enough to not need the second FET.

-awr

**wquiles** · 12-18-2005, 07:06 AM

Andrew,

Thanks to your great feedback and suggestions I will be doing further bench testing today (Sunday). Answering a couple of your questions:

1) You might be right in that at the moment it might be working more of a delayed start, rather than the soft start. I will also be expanding the scope reading on the area where the FET is turning on to get more detail.

2) Where you are placing the switch is in fact the most efficient setup, for a M*g. Since at the moment I am concentrating on the SF M6 variant, having the switch in-line with the battery is more realistic of the tailcap of the M6.

3) I only used the huge 33uF 100V since that is all I had at the time. I am about to leave for Fry's to pick up some "smaller" units

4) I like your idea of the sense resistor with just some wire - that will help us determine what is going on.

5) Once I get 'mark 1' running better, I will try the 'mark 2' version, but I will not try anything with two FET's anytime soon. I really want to keep this super simple to start with

.

6) About the MN60/61 with 3x17670 cells and these bulbs being 9V - Kiu and others have done it for many cycles, so it works. I just want to make it better by limiting the bulb-killing current inrush. However, if you have a spare LDO circuit for me to bench test on that space on my custom holder, please PM me with details - I will gladly pay for the parts and your trouble

Question: What program are you using to make these very simple circuit diagrams? I need something simple like that!

Will

**andrewwynn** · 12-18-2005, 10:53 AM

aah that's right.. M6 solution, yup you want the switch where you have it.

i knew you adapted the ckt to the cap on-hand.. been there done that.. my M66 right now has a couple capacitors i took off an only CD burner from the 90s. (real pain to find out the values.. can't read them in-ckt so have to desolder first, and i think they were glued on before soldering so it's really tough).

the sense resistor thing is a must.. i don't think voltage is as big of a deal as current.. i.e. i think i would start with the two inputs being Vgate and Ifet.

i think in the M6 variation you can take advantage of using the tailcap switch.. i'm just not sure how.. i was trying to figure out a way to use a diode for example.. putting a diode from the gate of the FET to the + of the lamp. The theory being.. that when you break the switch Vlamp goes to zip, but the FET is still on because of the charge on the cap.. drain the C1 through the diode and lamp through the FET, you can probably get away with no extra resistance though i would use a small resistance like 10k.

Logically enough when the cap drains enough the FET will shut off, right at the thresholod, but the other resistance will continue to drain the cap.

Another nifty idea that would get it to shut off quickly.. yet another pot.. to set up a maximum voltage to the gate.. so that rather than puttting Vbat on the gate.. keep it to like 4-5V (well of cousre i think in your tester that's all you're using).. but when you have it in a 10.8V ckt it'll act a bit differently with the same gate threshold.. anyhow if they Vgate is close enough to the threshold when you open the switch it will reset the cap quickly so multi-clicking will soft-start each time. It will make the mark2 variation more of a necessity.

The 'simple LDO' is only 'on paper' right now.. the schematic is shown on the ludicrously simple ldo thread. I think it only uses a diode for Vref and a couple NPN or PNP transistors with a couple bias resistors.. it's pretty ludicrously simple as the title suggests.

To me simple means less active components, so i like the idea of the chip with the Vref and op-amp built in.. all you need is a pot from the Vbulb to ground and the wiper goes to the (- in) on the op-amp.. you should be able to find a dip-version of that chip at fry's actually.. it should be a ludicrously simple ckt as well.. you might need a cap in there somwehre to keep the thing from oscillation.. and you would use the output of that ckt as the input to the one you are making now.. that would give you voltage regulation and soft start as well.

-awr

**wquiles** · 12-18-2005, 04:10 PM

Andrew,

I am convinced now that 'mark 1' is a gonner. For the reasons you stated, I need to work with 'mark 2' from now on

As it turned out, the circuit is not a delayed start nor a soft start - it is really doing both of them

. I measured today a long delay, a short one, and no circuit at all - just DD to the poor bulb

. If I watch the voltage at the battery pack, I can clearly see that the 'mark 1' circuit does help and it makes the hit on the battery less intense and the short circuit current is definitely lower than with just a DD connection.

Vnoload = 5.35V

When C1=4.7uF and R3=5K (shortest delay/soft-start), the Vdip at the battery pack was = 1.14V

When C1=4.7uF and R3=42K (medium delay/soft-start), the Vdip at the battery pack was = 0.70V

When C1=33uF and R3=42K (very long delay/soft-start), the Vdip at the battery pack was = 0.46V

With just a DD, the Vdip at the battery pack was = 1.44V !!!

Since the "real" load is the same in all cases, the circuit "does" help by providing a soft start and lowering the short circuit current going through the bulb. Of course, the unacceptable delay in 'mark 1' is not good, so I will play with 'mark 2' which "pre-loads" the voltage at a higher point but still provides a soft-start function

Thanks again for your help/guidance so far - this is fun

Will

**andrewwynn** · 12-18-2005, 04:58 PM

fun from this end too.. i kinda like just designing the concept and seeing somebody else take it from there and build the circuit.. usually i'll build one and they copy me but coming direct from theory is something a lot different.

Not sure what is on ch2... FET v? if so, the soft start is working fine, you can see the voltage drop logarithmically.. or inverse of exponentially whichever is.. just very quickly on the short models.

I would aim for 1/2 to 2/3 sec turn on time. i 'lucked out' in my driver ckt with a top-secret solution that make the voltage immediately turn on the gate but slowly rise at about 1/10th the RC time constant.. means i can use really small capacitors (1µF makes for like a full second turn on!).. which is awesome news for me.. SMD caps are cheap up to about 10µF than they are extremely expensive.. a 22µF cap is over $2.

The important value is not really shown here. .the difference between final voltage and the dip represents the extra current 'spike' at turn on.. (when measuring vbat).

It looks like your deltaV is from restingV? the important spike is the difference from the dip and the running voltage... and on the slower start you can see that the voltage spike is almost completely eliminated on the slower start.. is the time scale for the large divisions? what was the turn on delay for each?

-awr

**andrewwynn** · 12-18-2005, 05:13 PM

fun from this end too.. i kinda like just designing the concept and seeing somebody else take it from there and build the circuit.. usually i'll build one and they copy me but coming direct from theory is something a lot different.

Not sure what is on ch2... FET v? if so, the soft start is working fine, you can see the voltage drop logarithmically.. or inverse of exponentially whichever is.. just very quickly on the short models.

I would aim for 1/2 to 2/3 sec turn on time. i 'lucked out' in my driver ckt with a top-secret solution that make the voltage immediately turn on the gate but slowly rise at about 1/10th the RC time constant.. means i can use really small capacitors (1µF makes for like a full second turn on!).. which is awesome news for me.. SMD caps are cheap up to about 10µF than they are extremely expensive.. a 22µF cap is over $2.

The important value is not really shown here. .the difference between final voltage and the dip represents the extra current 'spike' at turn on.. (when measuring vbat).

It looks like your deltaV is from restingV? the important spike is the difference from the dip and the running voltage... and on the slower start you can see that the voltage spike is almost completely eliminated on the slower start.. is the time scale for the large divisions? what was the turn on delay for each?

-awr

**wquiles** · 12-18-2005, 05:21 PM

Andrew,

In the first three screenshots, the top trace is the Vbat. The 2nd trace is the Vds - so as the FET turns ON, the voltage quickly moves toward ground as it should, which of course turns the lamp ON

Specially in the fourth shot (DD), you can see the resting Vbat, then being hit with a short circuit very fast (the deep spike down), then the battery recovers and enters steady state, and then when the switch is open, the Vbat goes back to steady state resting.

As to the scales, I was hoping they would show in the photos:

- first is 40mS/div

- second is 100mS/div

- third is 200mS/div

- fourth is 40mS/div (this is the one with no circuit - just DD).

So do you think I am ready now for circuit 'mark 2'?

Will

**andrewwynn** · 12-18-2005, 06:18 PM

so on the final one it took 1.2s to start turning on and .2s to actually be turned on?

so i think if mk2 does what i've planned you can short-circuit most of that 1.2s.. and stretch out the .2 turnon.. though from the voltage dip it might not even be necessary. As you can see from the trace.. the voltage sweeps pretty fast down to zip on the Vds.

Now we need to get a current trace... iLamp v vGate might be an interesting trace. It's very interesting to see where on the curve the turn on happens.

That looks like a nice scope.. that's pretty high on my list of tools to get.

-awr

**wquiles** · 12-18-2005, 07:28 PM

Yes, that 1.2 second is a very, very long delay indeed

I have a 0.1 Ohm 5W resistor that I can put in series with the bulb - I should be able to read the voltage across to get the current

The scope is a Tektronix TSD3034, 4-ch, 300Mhz bandwidth,, 2.5GS/s, with all of the FFT options. I am borrowing it from work for the holidays

Will

**andrewwynn** · 12-18-2005, 09:12 PM

tell work i want in on that passaround

I haven't used a scope since '88.. i was trying to remember if the /div was the big or small.. that had to be kinda funny when you first flip the switch and nothing happens for a full second or more than finally 'blink'.

I'm kinda surprised i actually pre-conceived that problem before building the ckt. I was actually trying to solve the problem with an PN device.. like using a diode that would only be forward biased when the FET is off.. for example from the 'D of FET to the G of FET... which in your ckt would probably work.. you could try that..

theroy: when you flip the switch and it energizes the ckt, voltage is applied to the drain of the FET, forward biases the diode and hits the gate.. well of course once the FET turns on and with the diodes Vf, it will no longer be forward biased, but that diode will automatically get the fet to the threshold.. use a very small series resistor.

I can't use that design in my ckt because i have Vbat on the FET any time there is no current through the lamp.

i'm very interested to see the Mk2 of this ckt.

-awr

**wquiles** · 12-19-2005, 01:24 PM

Andrew,

I got some measurements of the current with the DD circuit - in other words, worst case scenario for the poor bulb

Per the scope, and per my Fluke voltmeter, using a 0.1 Ohm series resistor with the bulb, the steady state current is right at 1.0 Amp. Now that I can plot the initial current, look at how high is the peak current.

- Top trace is the Vbat at 2V/div

- Bottom/red trace is Vrsense at 1V/div for the first two, and 200mV/div on the last one (the one that looks noisier).

In here, at 100uS/div, as the switch is closed, the peak current is at least 14-15 amps!. I say at least since it is hard to measure the absolute peak with my setup and my not-so-current scope-using skills:

As time pases by, the bulb approaches steady-state, and the battery pack slowly recovers. This is at 1mS/div:

Finally, at steady state, the pack is happy and the bulb is drawing 1Amp. This is at 40mS/div:

Of course, I need to measure now "with" the circuit in place, but based on the much smaller Vbat dip that I saw earlier, I am expecting the inrush current to be smaller than 15Amps!!!. I will report later on this

Will

**andrewwynn** · 12-19-2005, 01:59 PM

i was a little suprised myself to be getting double digit peaks.. 1msec.. but with 100msec 'surges' being usualy in the 2-3x running current still pretty amazing. I will be very interested to see the difference with mark1 and then mark2 of the soft starter.

with mark2.. it should be possible to get the best of both worlds.. quickly getting to the threshohold voltage but slowly ramping through the gate transition voltage so the FET turns on relatviwly slowly.

Based on the initial results, it did look like the votlage changed in a controlled manner, but somehow it'd be better if we could contol the voltage based on the current initially.. a negative feedback based on the current draw would be cute... but would require more active devices.

I would be happy just to have the soft voltage ramp work to cause a relatively soft current ramp, even if there is a relative spike at the beginning.. having it be more like 2-3A not 15 sounds good to me. (there is a good chance that the 1msec spike will always be pretty high).

-awr

**wquiles** · 12-19-2005, 08:04 PM

Andrew,

With 'mark 1' in place I was able to get down to 4-5Amps, and if I had a very long time it got in to the 2Amp range - but with an unaceptable delay.

I started playing today with 'mark 2', and it is getting much better, but since now I have more components, it is taking a while to figure out the initial voltage and the appropriate soft-start. I ran out of time today but I hope to be able to post some screen shots tomorrow night

Will

**andrewwynn** · 12-19-2005, 11:04 PM

determine that set point of the pot 2 by making note of the vGate on mk1 when the FET turns on.. i would start about 0.1V below that value.. maybe put on the scope.. vGate (to ground) and iLamp would be good to plot.. it should jump up to like 1.8V or something than ramp up based on the RC.

it would be interesting also to plot vGate to ground vs pot2 wiper to ground and see how that 'jump start' compares.

oh.. i also realized .. that you might be able to utilize the pot2 gnd that will 'jump' between that 1.8V and ground as some input into shorting out the c1 when the ckt is off to reset it.. i would not worry about that initially though..

first.. expect that i'll take longer to turn off than on.. if it takes 2 sec. to turn off but 1/2 sec. to turn no that is fine initially.

-awr

**wquiles** · 12-21-2005, 11:52 AM

Andrew,

I have been making good progress on testing 'mark 2'. Unfortunately, I found a fatal flaw with the circuit, specially if you do more than just one "ON-OFF" cycle right after each other

What happens is that C1 continues to charge all of the way towards Vbat, so if you turn it OFF and then ON fairly quickly (less than 1 second) then Vc1 is still high enough that the FET turns ON hard and fast, therefore sending a spike of current (again!) to the poor lamp, just as if you had no circiut in there

Top/BLUE trace is Vbat
Bottom/YELLOW trace is Vgs

Here is a picture of the steady-state behavior. Notice how nice is the soft start and how there is no spike on the Vbat, just a nice gradual load condition as the FET turns on, then a short time for the battery to stabilize (horizontal scale is 100mS/div ; vertical is 1v/div):

Notice now what happens if I turn it ON, quickly OFF, and then ON again. Notice the strong Vbat dip for the second ON, and then even deeper on the 3rd:
(horizontal scale is 200mS/div ; vertical is 1v/div):

This is another closeup of a quick ON-OFF-ON cycle. On this case it is almost worst case since there is almost no soft start for the second cycle:
(horizontal scale is 200mS/div ; vertical is 1v/div):

And it actually gets worst if you wait a little after the first ON since Vc1 is even larger and the FET turns ON hard for the second and third cycles, each time harder (negative Vbat spike is getting larger):
(horizontal scale is 1S/div ; vertical is 1v/div):

On this last one, I do many quick, back to back cycles, and I am getting a pretty hard spike on each cycle after the first one:
(horizontal scale is 1S/div ; vertical is 1v/div):

I even put a 1N004 diode in parallel to the lower part of R3 (to shorten the discharge cycle), and although it helps, it is just not enough - we would need a very fast path to discharge C1 within 100mS or so

Now, if you just turn it ON, use it, and turn it OFF, it works perfect!. It is only the quick ON/OFF/ON/OFF behavior that has a problem. I think that adding a transistor (to detect Vbat=zero) might force the C1 to discharge quicker, although I am not sure how I would wire it to make it work properly.

The other point that I have yet to investigate, is what happens as the battery looses power with use. Since the lower starting set point will become smaller (being a constant ratio) then the circuit "should" take longer and longer to turn ON since it will take longer to achieve the same Vgs to turn the FET ON. Maybe this behavior will be a built-in indicator that the battery is starting to run low?

Isn't interesting how this "simple" circuit is now getting more complicated

Will

**andrewwynn** · 12-21-2005, 08:34 PM

I believe i did suggest a 3rd pot that would be the 'high gate' voltage.. so you could have a voltage bridge to get the maximum gate voltage.. i did predict that would happen. The best way would be to drain the cap with some active device like a cheap FET that only is active when voltage is not applied .. that is biased in a way that when lower pot is above ground it turns off, but when it goes back to ground it turns on and drains the cap with a very small resistance, like 5k or something.

Vds might be more useful to plot, or Vgs vs Vds .. i can't tell where the exact threshold voltage is, but i think i see it happen in one or two of the plots.. very cool to see the Vgs ramping up and then somewhere in there the Vbat starts to sag.. good stuff.

'going fancy' you would put in a vreg that would keep the ckt constant voltage that controls the FET so there is no variation when the battery dies.

I will try to get to the computer that has the schematic software.. did i ever mention what it is.. 'design works light' i think it might only be for mac, but if you look on versiontracker.com you might find something simlar that is freeware for windows, given the odds that's what you are using.

Looking at the spikes, they don't look all that terrible.. yes some spike but on a warm lamp you just turned off less than a second ago.. need to see how much of a current spke is going on.. and notice that it's in the milisecond variety still, not 1/0th of a second variety.

i think this would probably work: put a pch fet this orientation:

gate to the bottom of C1.. Drain to the gate of FET1 and Source through a relatively small resistance to ground.

I just realized that if the gate voltage gets high enough it might bias the thing on even while the ckt is running but all it would do is keep putting current through the high resistance of R3 and it would keep the Vgate lower.. so just a matter of tweaking the pot settings and would probably achieve the desire of having that 3rd pot.

So.. might get what you want with just that 3rd pot (voltage bridge on the whole ckt.. put the pot from SW1 to ground.. wiper to top of R3.. use a relatively low resistance like 50K (compared to 1M in the design)... i think you are using lower Rs so adjust accordingly... than you can get Vgate-max closer to the Vgate-threshold so it recycles faster.

Otherwise.. trying for an active solution.. putting a pch fet like described.. you might need a bias resistor or two.. but have the Vgate set so the threshold plays nice with the voltage base at C1 so that when the ckt is turned off it instantly will be 'full on'.. and when the ckt is first turned on (no voltage on c1).. the FET2 will be full off.

It would be very interesting if it's set up such that as C1 charges eventually it will turn FET2 on and maintain a precise value on C1, as long as FET1 is full on,that would be a nearly ideal solution.

-awr

**andrewwynn** · 12-21-2005, 08:42 PM

oh.. speaking of 'simple getting complicated'..

and 'under the hood'

(hand made traces with 24ga bare wire).. and now it has like 4 more 'traces' since this picture was taken... but it also has soft-start and i fixed the startup issues.

-awr

**wquiles** · 12-22-2005, 02:20 PM

Andrew,

Thanks much for the information about DesignWorks Lite. They "do" offer it for Windows, and I have 30 days to try - only $40 to register, and it is very easy to use

. Here is my redrawn 'mark 2' without the pots, as I recall the actual values used (have not been to the bench yet today, so these values are from memory and might be off a little!):

I think I will try the additional FET/transistor this coming weekend for the discharge path. Even as it is today, it works great with the charged battery pack, so I want to do some more tests while the pack discharges. Theory is great, but nothing beats actual bench testing "and" being able to see/measure using the scope

Will

**andrewwynn** · 12-22-2005, 02:42 PM

Oh.. in the case of using LiONs to power SF lamps.. i would be prepared to include like 0.075 to 0.01 ohm power resistor (high powered sense resistors) in series with the whole shabang to keep the initial voltage low enough to protect the lamp.. might not be necessary from the 10.8V solution but from the 7.2V solution it is.

I just noticed.. that with R3 there.. you could put a zener in parallel witht he C1 and it would make for a maximum voltage on the gate and consistant operation with any battery voltage. I love how this is coming together, hope some people will clone it for their own use.

-awr

**wquiles** · 12-22-2005, 02:53 PM

You mean like this below? If I pick a Zenner with a voltage around 3 Volts (which is above the Vgs required to turn it on, which I think it was 2.8V or so), that could work well

**andrewwynn** · 12-23-2005, 11:23 AM

exactly what i'm talking about.. but maybe a little higher value... thre reason being that the Rdson is lower with higher Vgs.

Z1 might make D1 obsolete

doncha love having DWL?

-awr

**wquiles** · 12-23-2005, 05:58 PM

I picked up a 3.0V Zenner today at Fry's - I hope to try it tonight if I can get my kids to sleep early

Yes, DWL simply rocks, and it was so EASY to use and setup. The very large library, easy way to create new simbols, and easy routing makes it a bargain for $40

Will

**wquiles** · 12-23-2005, 09:53 PM

Andrew,

Well, I really have no clue what is going on

The zener is not working like I expected at all

, and in fact never seems to get to the 3V it should

. From what I have measured, it seems to clamp at about 1.2 volts or so

Instead of using the 3V zener (NTE5065A) across C1 and R3, I decided to try it just accross C1, and guess what, even though the zener is not behaving like it should, the whole circuits works perfect now

Here is the new circuit:

Here is the circuit with the zener disconnected (to show the "before" view of things). Note how between each switch closure the Vc3 keeps increasing since there is not enough time between presses to discharge it properly and since there is nothing preventing the cap's voltage from rising towards Vbat:

Here is the "mistery" circuit above with the zener connected across C1 (this is the "after" view of things). Note now how the circuit is just perfect, and how there is never a Vbat spike and how the Vc3 is now capped (somehow) by the misterious 3V zener who is not working according to what I expected.

The awesome thing about this circuit is that now, I get a soft start (I can actually see the bulb getting brighter until is full ON, so it is not just delayed start) after each switch press, not just the first one like before.

I also tested not connecting D1, but it does help to speed the discharge of C1, so I kept it in there. I tried playing with various values of R2 and C1, but these values matched the strange (to me) behavior of the zener.

I tried different values of R3, but the circuit (with the zener) is very particular to these values as when I tried 20K the whole balance of the zener was ruined since the starting voltage was now higher and the C1 effectively gave the gate of Q1 a higher voltage quicker than before, so now I loose the soft-start for switch presses #2 and so on. With a lower value (10K) then (because of the zener), there is never enough voltage at the gate to fully turn Q1 ON.

So, do you have some clues/suggestions for me?

Will

**andrewwynn** · 12-24-2005, 06:33 AM

What you ended up with was my design.. i looked too quick at your first mark3 design... with the zener to ground, it might work with a 5V zener.

When making small ckts.. big caps = sucky.. that's why i originally did a design with 4.7uF for the cap.. did you work on the ckt with a smaller cap? you should be able to just use exactly proportional increase in R2 but can leave R1/R3 the same..

What are you kidding? we have a circuit!

R1/R3 set up a voltage bridge that is non-capacitive.. they simply have to be a ratio that puts a voltage just below the gate threshold voltage.. the only time you'd hvae to tweak R3 is if you change the voltage of the bat... or a different FET that had a different threshold voltage.

It would be a 'cleaner' design to have yet another zener in parallel with R3 or even in replacment of R3.. but better put at least a small (200ohm maybe) resistance in series.. because when the ckt is turned off C1 will dump a bunch of charge through very quickly.

with the relatively small fractional value from Vbat to Vbase (bottom of C1) based on R3/(R1+R3).. it won't swing enough during typical voltage swings, but you have to make sure that with fresh batteries C1 base doesn't have enough voltage to turn on the ckt immediately.

I am thinking your 1.2V measurement was across C1? when you had the zener across C1, R3 ? that would make sense if your base voltage is 1.8V which is right about what i'd expect...

It helps greatly to have the zener only across C1.. what happens is when it's working.. you get 1.8V at the base and that puts 4.8V on the gate.. not a bad gate voltage.. that's usually going to get you the fast majority of your Rdson taget (i.e. some FETs will be 4mohm at 4Vgs and 3.3mohm at 10Vgs).. it's a moot point as long as you get to that first target value. Anyhow.. in this same example.. as soon as you turn off the ckt, you will have 3V on the cap, but now the base of the cap immediately drops to ground which puts the gate at 3V, which is right at the threshold of being on, but the diode will quickly discharge that 3V through only 50kohm.. that actually could be lower for a faster discharge.. but it seems that could be a moot point, looks like the turn on and turn off is working great even for 'blinking'.

I would work on putting in a lower cap and higher R2.. the rest should work as-is with that solution.. the RC calculator says 431 msec to 23% which is my rough guess of 1V increase from the start before FET sweeps from 'just starting' to 'full on'.. if you use 4.7uF cap, the calculator says 350kohm is the proper resistance.

with the bigger R2, it would necessitate D1 sticking around, but would make an even bigger difference in the discharge vs charge rate.

I really like how the D2 comes into play and does exactly what i planned for it.. the best part is that it means it works with a wide range of Vbat without the ckt changing performance much.. R3 could be exchanged for a different zener that would have to match the needs of the particular FET.. come to think of it.. probably can't replace R3.. would have to have it parallel to R3.. that way if Vbat is higher, it clamps the 'base' voltage, but keeping R3 is needed to do the quick 'drop' on the Vgs.

Wow, it was really neat to see those o-scope traces.. thanks for doin' all the legwork for me. very exciting project.

-awr

**wquiles** · 12-24-2005, 11:43 AM

Andrew,

You make multiple excellent points/comments, so I will try to address them one by one